How is the exception mechanism implemented in MIPS?

The MIPS exception mechanism. The exception mechanism is implemented by the coprocessor 0 which is always present (unlike coprocessor 1, the floating point unit, which may or may not be present). The virtual memory system is also implemented in coprocessor 0.
For More Information Please Refer:
http://www.cs.iit.edu/~virgil/cs470/Labs/Lab7.pdf
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