How actually the register stores data? (I mean in microprocessor it says this register stores 8 bit / 16 bit how in reality it happens inside microprocessor?)

A device called a flip-flop holds a single bit of data. It’s made up of a few pairs of simple logic gates cross-wired in a particular way such that it reads and holds its input data at the beginning of every clock cycle, and then presents that data on its output in a stable fashion until the next clock cycle takes place. 8 of these in parallel makes an 8-bit register. Additional logic within the processor decides when to write new data into a given register (as opposed to simply maintaining its prior state) or to use the output values as appropriate when needed as part of the current instruction being executed.

Just like other ways of constructing volatile memory, as soon as the power’s removed these registers lose whatever state they happened to contain.

This question is a bit like asking, “What determines that a vehicle’s engine is 4, 6, or 8 cylinder?” The short answer is that the manufacturer determines whether a microprocessor is 8, 16, 32, or 64 bit. Even today, some manufacturers produce microprocessors (and/or microcontrollers) with a variety of bit sizes, including 8-bit products.

In general, an N-bit microprocessor (CPU) has an ALU (Arithmetic Logic Unit), registers, an address bus, or data bus having N bits. Notice that I said or. This is a pretty broad definition, because some CPU architectures have a mixture of internal sizes and mi

This question is a bit like asking, “What determines that a vehicle’s engine is 4, 6, or 8 cylinder?” The short answer is that the manufacturer determines whether a microprocessor is 8, 16, 32, or 64 bit. Even today, some manufacturers produce microprocessors (and/or microcontrollers) with a variety of bit sizes, including 8-bit products.

In general, an N-bit microprocessor (CPU) has an ALU (Arithmetic Logic Unit), registers, an address bus, or data bus having N bits. Notice that I said or. This is a pretty broad definition, because some CPU architectures have a mixture of internal sizes and might use different sizes internally and externally. The size of the data bus has often been used to drive the bitness of the CPU, but that’s not always the case.

Consider the following examples:

  • Zilog Z80 - Considered an 8-bit CPU, it has an 8-bit data bus, 16-bit address bus, and a mix of 8-bit and 16-bit registers.
  • Intel 8086 - Considered a 16-bit CPU, it has a 16-bit data bus, a 20-bit address bus, and 16-bit registers.
  • Intel 8088 - Considered a 16-bit CPU, even though it has only an 8-bit external data bus. Everything else is identical to the 8086. The original IBM PC was based on this CPU.
  • Intel 80386 - Considered a 32-bit CPU, it has a 32-bit data bus, 32-bit address bus, and 32-bit registers.
  • Intel 80386SX - Considered a 32-bit CPU, even though it has only a 16-bit external data bus and a 24-bit external address bus. Everything else is identical to the 80386.

As you can see, the bitness of a CPU is not always based on the size of the external data bus, the size of the external address bus, or the size of the largest registers. It usually has to do with how much data it can move around at a time internally, but that’s not always the case.

So let's say we're talking about a classic processor like a 6502 or a z80. 16-bit address bus, 8-bit data bus.

If you look at a pinout if either of these, you'll see literally A0-A15 and D0-D7. In a system made with either of these, if the CPU sends out the number 0x1234 onto the address bus in read mode, it expects the memory system to return exactly the single byte located in memory location 0x1234 onto the data bus. Easy-peasy.

When the data bus is not exactly eight bits, things *might* get pretty weird, since we're now asking for location 0x1234, but do we now mean bytes, or 2-byte words, or

So let's say we're talking about a classic processor like a 6502 or a z80. 16-bit address bus, 8-bit data bus.

If you look at a pinout if either of these, you'll see literally A0-A15 and D0-D7. In a system made with either of these, if the CPU sends out the number 0x1234 onto the address bus in read mode, it expects the memory system to return exactly the single byte located in memory location 0x1234 onto the data bus. Easy-peasy.

When the data bus is not exactly eight bits, things *might* get pretty weird, since we're now asking for location 0x1234, but do we now mean bytes, or 2-byte words, or…? The 8088 (which is internally is a 16-bit processor, but has an 8-bit data bus) has no problem, since its 8-bit data bus is unambiguous (though it has the x86 complexity of segment:offset addressing and 20 address lines, but that's another story).

But what about, say, the Motorola 68000, which has 24 address lines, 16 data lines, and is 32-bits internally? Well, the original 68k has no A0 pin at all! It simply tells the memory system to give it 0x1234 and the memory system returns two bytes, both 0x1234 and 0x1235. In practice, it's a bit more complex than this (there's a whole thing about what byte/s are valid, and there are various distinctions between processors[1]), but you get the idea.

Finally, if you look at modern DIMMS, there is the concept of a latched address scheme, where a row is sent, then a column, then multiple bytes are read/written. So multiple gigabytes of memory are addressed with only 15 address lines (15 rows + 15 columns + 8 bytes/cell -> 2^33 or 8GB!).

Footnotes

In Intel 8085 Microprocessor, The Flag register is a part of the Program/Processor Status Word. The PSW contains 8 bits out of which 5 flag bits (flip flops store the information of the execution in Accumulator) represent the status of execution of the Microprocessor. (In some books it is given that the PSW is 16 bit register which contains Flag Register(8 bits) and Accumulator(8 bits). But I am writing the answer as PSW is 8 bits and it is what you are referring here as Flag register). These 5 flags are :

  1. Sign Flag - It is the Most Significant bit(D7 bit) of the Flag register. This flag is set

In Intel 8085 Microprocessor, The Flag register is a part of the Program/Processor Status Word. The PSW contains 8 bits out of which 5 flag bits (flip flops store the information of the execution in Accumulator) represent the status of execution of the Microprocessor. (In some books it is given that the PSW is 16 bit register which contains Flag Register(8 bits) and Accumulator(8 bits). But I am writing the answer as PSW is 8 bits and it is what you are referring here as Flag register). These 5 flags are :

  1. Sign Flag - It is the Most Significant bit(D7 bit) of the Flag register. This flag is set, when MSB (Most Significant Bit) of the result is 1. Since negative binary numbers are represented in the 8085 CPU in standard two’s complement notation, SF indicates sign of the result.

1 - MSB is 1 (negative)

0 - MSB is 0 (positive)

  1. Zero Flag - It is Second Most Significant bit(D6 bit) of the Flag Register. This flag is set, when the result of operation is zero, else it is reset.

1 - Zero result

0 - Non-zero result

  1. Auxiliary Carry Flag - It is D4 bit of the Flag Register. This flag is set whenever there has been a carry out of the lower nibble into the higher nibble(bit 3 to bit 4) or a borrow from higher nibble into the lower nibble (bit 4 to bit 3) of an 8 bit quantity, else it is reset. This flag is used by decimal arithmetic instructions.

1 - Carry is generated between bit 3 and bit 4

0 - otherwise

  1. Parity Flag - It is the D2 bit of the flag register. This flag is set whenever the result has even parity, an even number of 1 bits. If parity is odd, PF is cleared.
  2. Carry Flag - It is the Least Significant bit(D0 bit) of the Flag register. This flag is set whenever there has been a carry out of, or a borrow into, the higher order bit of the result of Addition, Subtraction or Shift Operation.

1 - Carry is generated due to the operation on the Accumulator.

0 - No carry is generated.

After every arithmetic or logical operation on the Accumulator the status of the flag bits change according to the execution.

Hope you find it useful.

Thank you for reading.

There is a notation we follow.
Physical Address
The 20 bit address which needs to be
stored.
It ranges from 00000H to FFFFFH (Hexadecimal notation) .
Base Address:
The address at which a given memory segment starts and we use it for de-markation.
Offset address
(Distance from the base address) is a location with 64 kb segment range. It ranges from 0000H to FFFFH
Logical address
Something we denote on paper as a short hand representation of the above addresses. It consists of a segment value and offset address.
Logical address is specified as
Segment base : Offset value.

Physical address

There is a notation we follow.
Physical Address
The 20 bit address which needs to be
stored.
It ranges from 00000H to FFFFFH (Hexadecimal notation) .
Base Address:
The address at which a given memory segment starts and we use it for de-markation.
Offset address
(Distance from the base address) is a location with 64 kb segment range. It ranges from 0000H to FFFFH
Logical address
Something we denote on paper as a short hand representation of the above addresses. It consists of a segment value and offset address.
Logical address is specified as
Segment base : Offset value.

Physical address is obtained by shifting the segment address 4 bits to left adding the offset address.
ie.,
Physical address = ( Segment base*10H ) + Offset Value.

Ex: If we want to find the physical address of a given
Logical address: A4FBH:4872H
Segment's base address: A4FBH
Offset value: 4872H
Shifting the segment address 4 bits to left A4FBH<<4 gives A4FB0H
Now adding offset address to A4FB0H
We get:

A4FB0H
+
4872H
_____
A9822H
_____

A simplification is that it implies that it has 16 bit arithmetic instructions. 8 bit processors only had 8 bit arithmetic instructions. Modern CPUs have 64 bit arithmetic instructions.

8 bits was always limiting. 16 bits was a bit limiting too, because that only allows for integers between -32768 and 32767. 32 bit was pretty good, but as files got very large, it became a problem because of file size limitations, RAM limitations, and some other limitations.

64 bits seems to be large enough for all uses I know of - if you need larger than 64 bit integers, there’s way around that using arbitrary p

A simplification is that it implies that it has 16 bit arithmetic instructions. 8 bit processors only had 8 bit arithmetic instructions. Modern CPUs have 64 bit arithmetic instructions.

8 bits was always limiting. 16 bits was a bit limiting too, because that only allows for integers between -32768 and 32767. 32 bit was pretty good, but as files got very large, it became a problem because of file size limitations, RAM limitations, and some other limitations.

64 bits seems to be large enough for all uses I know of - if you need larger than 64 bit integers, there’s way around that using arbitrary precision libraries, or simply using floating point values, and accepting a loss of precision. But for addressing memory, 64 bits is more than enough, because that’s a currently inconceivable amount of RAM ( 1.8 * 10^19 bytes of addressable RAM.) And it’s big enough for any files I know of 1000 Petabytes or something like that. While I can conceive of some large database maybe containing that much info, it would not be a single file. But I digress…

Wikipedia says that 64 bits refers to register size and address size. Registers are used by the CPU for computations, intermediate values, and other things. This is also a good answer, but in my experience is the same as the answer in the first sentence ( as register size usually dictates max integer size for arithmetic.)

If this is a homework question, I suggest you use the answer from the course’s text. But if you are asking out of curiosity, I think you will find my simplified answer is pretty accurate.

I guess this is fairly simple.

You need to know a small thing about how the addressing and transmission works. (Correct me if i am wrong)

Heard of multiplexer?

This is an essential component of any transmission. why?


The above is a simple 2:1 (
2 input channel-1 output channel) Multiplexer.

We know that in a computer, data needs to be constantly transferred,
for example,
1) from secondary storage to primary storage
2) The graphic content has to be processed by the GPU and sent to the display unit. etc.

I hope you get the vibe. There is always data being sent from one device to other internally. No

I guess this is fairly simple.

You need to know a small thing about how the addressing and transmission works. (Correct me if i am wrong)

Heard of multiplexer?

This is an essential component of any transmission. why?


The above is a simple 2:1 (
2 input channel-1 output channel) Multiplexer.

We know that in a computer, data needs to be constantly transferred,
for example,
1) from secondary storage to primary storage
2) The graphic content has to be processed by the GPU and sent to the display unit. etc.

I hope you get the vibe. There is always data being sent from one device to other internally. Now check out your Computer, It has only one bus cable for all this.
Our aim is to reduce the no. of cables being used. Here comes the Multiplexer,

Viola!

In the above figure there are two sources of input, we use a single bit "sel" to find which source it is! That is, 1 bit is used to tell which source has it input being transmitted,

logical right? 1 bit can have two values 0 or 1.
Thus,
0-1st sourse (means 1st source is transmitting data)
1-2nd source

Now, how many bit you need for addressing 4 sources? 2 bits!
00-1st source
01-2nd source
10-3rd source
11-4th source

Similarly, 8 sources require 3 bits to uniquely identify it.
Thus using a multiplexer data from multiple sources can sent through 1 single channel.

Now comes the demultiplexer. Above is 1:2 Demultiplexer (1 channel input-2 channel output)

So out of the multiple sources, the "sel" or select gives the unique bit values to find which source is transmitting data. At the receiver end, a demultiplexer is used, wherein, it uses the "sel" bits to give the transmitted data to the necessary output device (could be a different output device, so "sel" may vary).

Thats it!

1) Doing this helps us in easy transmission which reduced complexity in terms of cables
2) Reduction in cost
3) Easy addressing of devices (as a multiple of 2). Each address is unique and 16 bit means 2^16 possible devices could be connected.
4) Not only devices, each bit/byte in the primary and secondary need to be addressed. Thus, 32 bits or 64 bits can address a large number of location/devices.

Thus, since we are dealing with binary values, everything is in powers of 2. So, no 6 or 17...etc.

What is the register design for 16-bit microprocessors?

That depends on the architecture, and the instruction set.

some have limited registers… others have more.

One interesting one was the TI9900. Only three internal registers. But one of them is the stack, one status register, one a workspace pointer… where 16 offsets are used to identify 16 separate “registers” for use in the instruction set.

The PDP-11 had 8 general purpose registers (including the PC - R7, and SP - R6).

Others had different sets. 2 index registers, accumulator, PC, status…

Take your pick. One other interesting one was M68010. T

What is the register design for 16-bit microprocessors?

That depends on the architecture, and the instruction set.

some have limited registers… others have more.

One interesting one was the TI9900. Only three internal registers. But one of them is the stack, one status register, one a workspace pointer… where 16 offsets are used to identify 16 separate “registers” for use in the instruction set.

The PDP-11 had 8 general purpose registers (including the PC - R7, and SP - R6).

Others had different sets. 2 index registers, accumulator, PC, status…

Take your pick. One other interesting one was M68010. The data bus was 16 bits, but programmatically, the ISA was 32 bits. There were also 8 bit, 16 bit, and 32 bit versions.

32bit cpu means in one cycle a cpu can fetch 32bit instructions only and under 32 bit.....
16 bit means instructions will be less sized ..... So you might need two cycles to perform the same task which you were doing in one cycle in 32 bit
Ready example -- 16 bit cpu first cycle - give me water
16 bit cpu Second cycle --turn on lights
32bit cpu first cycle - give me water and turn on lights
Longer instruction - less cycles

  • Bit means 0 or 1
  • 1 byte=8bits.
  • 1 nibble = 4bits
  • 1 word = 16bits

A 8 bit register can accomodate 8 bits (1 byte) in it. On other way, we can say that it has two nibbles (lower and upper).

e.g: accumulator is of 8bit (8085 microprocessor)

A 16 bit register can accomodate 16 bits (2 bytes) in it. On other way, we can say that it is one word.

e.g: a register pair say HL(8085 microprocessor) is of 16 bit.